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Published Articles >> Table of Contents >> Abstract
Asia and South Pacific Design Automation Conference 1999 (ASP-DAC'99)
p. 45
A Single-Chip CMOS CCD Camera Interface Circuit with Digitally Controlled AGC
Jin-Kug Lee, Sogang University, Seoul, Korea
Dong-Young Chang, Samsung Electronics Co., Ltd., Yongin, Korea
Geun-Soon Kang, Samsung Electronics Co., Ltd., Yongin, Korea
Seung-Hoon Lee, Sogang University, Seoul, Korea
Full Article Text:
 
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ASPDAC.1999.759706
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| Abstract |
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This paper describes a single-chip
solution for CMOS CCD camera interface systems.
The required AGC gain in the proposed circuit is
controlled directly by digital bits without conventional
extra DAC's. Nonlinear errors such as offsets in
signal paths are automatically removed during black-level
correction. The AGC outputs are transferred
to a 10b on-chip ADC. The prototype implemented
in a 0.5 um n-well CMOS process shows the 32-dB
AGC dynamic range in 1/8-dB step with 173 mW at
3 V and 25 MHz.
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 Additional Information
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Citation:
Jin-Kug Lee, Dong-Young Chang, Geun-Soon Kang, Seung-Hoon Lee,
"A Single-Chip CMOS CCD Camera Interface Circuit with Digitally Controlled AGC,"
asp-dac,
p. 45,
Asia and South Pacific Design Automation Conference 1999 (ASP-DAC'99),
1999
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