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Published Articles >> Table of Contents >> Abstract
14th IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP'03)
p. 144
Using Media Processors for Low-Memory AES Implementation
J. Irwin, Zarlink Semiconductor Inc.
D. Page, Department of Computer Science, University of Bristol
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DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ASAP.2003.1212838
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| Abstract |
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Most performance studies of AES make traditional space versus time trade-offs by allowing large lookup tables to accelerate operations that would normally be calculated by the processor. However, AES is a versatile algorithm and can also be optimised for low-memory use in constrained environments. In this paper we investigate the possibility of getting the best of both worlds - an application specific hardware and software solution that has a low dependency on memory yet still executes fast enough to consider for use in production systems. The resulting software is attractive in high level design since it allows AES to be more easily deployed as a composable element in larger systems and scale better as processor speed increases.
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 Additional Information
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Citation:
J. Irwin, D. Page,
"Using Media Processors for Low-Memory AES Implementation,"
asap,
p. 144,
14th IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP'03),
2003
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