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16th Conference on Advanced Research in VLSI (ARVLSI'95)   p. 108
Bit-serial bidirectional A/D/A conversio

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DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ARVLSI.1995.515614
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Abstract
A fault-tolerant VLSI architecture implementing a bi-directional bit-serial A/D/A (analog-to-digital and digital-to-analog) converter is presented. Both functions of algorithmic D/A conversion and successive approximation A/D conversion are combined into a single device, converting bits in the order from most to least significant. The MSB-first order allows for robust implementation, relatively insensitive to component mismatches, offsets and nonlinearities. Also, since the A/D conversion makes use of the intermediate D/A conversion results, matched monotonic characteristics are obtained in both directions of conversion. The final D/A result is available at the end of A/D conversion, and can be used directly in applications calling for analog quantization. More general use of the A/D/A converter allows for bi-directional read/write digital access to local analog information in VLSI. The cell supports dense integration of low-power data conversion units along with digital processors or sensory circuitry in a standard CMOS process. Experimental results from a prototype VLSI implementation are included. Including control logic, the A/D/A cell measures 216 /spl mu/m/spl times/315 /spl mu/m in a 2 /spl mu/m CMOS process, and achieves 8-bit untrimmed monotonicity at 200 /spl mu/W power consumption for a 20 /spl mu/sec conversion cycle.
Additional Information
Index Terms- digital-analogue conversion; analogue-digital conversion; VLSI; integrated circuit reliability; CMOS integrated circuits; bidirectional bit-serial convertor; algorithmic DAC conversion; successive approximation ADC; D/A conversion; A/D conversion; fault-tolerant VLSI architecture; matched monotonic characteristics; CMOS process; 2 micron; 200 muW; 20 mus

Citation:  G. Cauwenberghs, "Bit-serial bidirectional A/D/A conversio," arvlsi, p. 108,  16th Conference on Advanced Research in VLSI (ARVLSI'95),  1995

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