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Published Articles >> Table of Contents >> Abstract
12th IEEE Symposium on Computer Arithmetic (ARITH-12 '95)
p. 222
Hardware Design and Arithmetic Algorithms for a Variable-Precision, Interval Arithmetic Coprocessor
Michael J. Schulte, The University of Texas at Austin
Earl E. Swartzlander, Jr., The University of Texas at Austin
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DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ARITH.1995.465354
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| Abstract |
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This paper presents the hardware design and arithmetic algorithms for a coprocessor that performs variable-precision, interval arithmetic. The coprocessor gives the programmer the ability to specify the precision of the computation, determine the accuracy of the results, and recompute inaccurate results with higher precision. Direct hardware support and efficient arithmetic algorithms for variable-precision, interval arithmetic greatly improve the speed, accuracy and reliability of numerical computations Performance estimates indicate that the coprocessor is 200 to 1,000 times faster than a software package for variable-precision, interval arithmetic. The coprocessor can be implemented on a single chip with a cycle time that is comparable to IEEE double-precision floating point coprocessors.
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 Additional Information
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Index Terms- Interval arithmetic, precision, computer arithmetic, coprocessor, hardware, numerical computations, arithmetic algorithms
Citation:
Michael J. Schulte, Earl E. Swartzlander, Jr.,
"Hardware Design and Arithmetic Algorithms for a Variable-Precision, Interval Arithmetic Coprocessor,"
arith,
p. 222,
12th IEEE Symposium on Computer Arithmetic (ARITH-12 '95),
1995
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