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12th IEEE Symposium on Computer Arithmetic (ARITH-12 '95)   p. 208
Arithmetic for Relative Accuracy
R. Van Drunen, Rijksuniversiteit Groningen
L. Spaanenburg, Rijksuniversiteit Groningen
P. Lucassen, Rijksuniversiteit Groningen
J.A.G. Nijhuis, Rijksuniversiteit Groningen
J.T. Udding, Rijksuniversiteit Groningen

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DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ARITH.1995.465357
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Abstract
Of the three factors named in Moore's first Law that drive the advance of computational systems, circuit design receives relatively little mention. We introduce here a circuit variety that allows to include accuracy considerations. It is shown that accuracy-drive can be effectively realised and leads to 60% speed improvement. Details are given of a floating-point unit with full hardware support of complex calculations, specifically tailored to speed-up MD-simulations on the GROMACS scientific parallel computer.
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Citation:  R. Van Drunen, L. Spaanenburg, P. Lucassen, J.A.G. Nijhuis, J.T. Udding, "Arithmetic for Relative Accuracy," arith, p. 208,  12th IEEE Symposium on Computer Arithmetic (ARITH-12 '95),  1995