A GaAs IEEE Floating Point Standard Single Precision Multiplier

This paper presents a GaAs IEEE floating point standard single precision multiplier. A modified carry save array is used in conjunction with Booth's algorithm to reduce the partial product addition and interconnection. A special rounding technique called Trailing-1's Predictor is used to speed up the final addition and rounding. The combination of the fast arithmetic architecture and the compact layout style achieves 4ns multiplication time with 3.5W power dissipation at 75oC giving 14mW/MHz. The area is 2.43mm by 3.77mm (excluding pads) and uses 28,000 transistors to give a density of 3056 transistors/mm2 for 0.8-um GaAs technology.