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Published Articles >> Table of Contents >> Abstract
January/February 2004 (Vol. 24, No. 1)
pp. 24-31
ETA: Experience with an Intel Xeon Processor as a Packet Processing Engine
Greg Regnier, Intel
Dave Minturn, Intel
Gary McAlpine, Intel
Vikram A. Saletore, Intel
Annie Foong, Intel
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DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MM.2004.1268989
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| Abstract |
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As part of an effort to accelerate server TCP/IP networking, Intel R&D has developed a software prototype that uses one of the intel xeon processors in a multiprocessor server as a packet processing engine (PPE). This prototype serves as a vehicle for empirical measurement and analysis of a highly programmable PPE that is closely tied to the server's core CPU and memory complex.
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 References
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 Additional Information
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Citation:
Greg Regnier, Dave Minturn, Gary McAlpine, Vikram A. Saletore, Annie Foong,
"ETA: Experience with an Intel Xeon Processor as a Packet Processing Engine,"
IEEE Micro,
vol. 24,
no. 1,
pp. 24-31,
Jan/Feb,
2004
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