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July/August 2003 (Vol. 23, No. 4)   pp. 21-31
Microcode Processing: Positioning and Directions

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DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MM.2003.1225960
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Abstract
Microcode is an important innovation in computer engineering. The authors discuss the evolution of microcode from its introduction to its decline and to its likely resurgence in custom computing machines. Furthermore, they present a microcoded machine augmented with field-programmable gate arrays (fpgas) and provide experimental evidence that it can substantially increase the performance of some media benchmarks.
References
[1] M.V. Wilkes, "The Best Way to Design an Automatic Calculating Machine," Proc. Manchester Univ. Computer Inaugural Conf., Ferranti Ltd., 1951, pp. 16-18.
[2] A. Padegs, B. Moore, R. Smith, and W. Buchholz, The IBM System/370 Vector Architecture: Design Considerations IEEE Trans. Computers, vol. 37, pp. 509-520, 1988.
[3] G. Triantafyllos, S. Vassiliadis, and J. Delgado-Frias, "Software Metrics and Microcode Development: A Case Study," J. Software Maintenance: Research and Practice, vol. 8, no. 3, May-June 1996, pp. 199-224.
[4] G. Tomlinson and P. Adams, "Microprogramming: A Tutorial and Survey of Recent Developments," IEEE Trans. Computers, vol. 29, no. 1, Jan. 1980, pp. 2-20.
[5] G. Kane and J. Heinrich, MIPS RISC Architecture, Prentice-Hall, Englewood Cliffs, N.J., 1992.
[6] S. Vassiliadis, B. Blaner, and R. Eickemeyer, "SCISM: A Scalable Compound Instruction Set Machine," IBM J. Research and Development, vol. 38, no. 1, Jan. 1994, pp. 59-78.
[7] TriMedia32 Architecture (preliminary specification), TriMedia Technologies, 2000.
[8] Intel IA64 Architecture: Software Developer's Manual, Intel Corp., 2000.
[9] S. Vassiliadis, S. Wong, and S. Cotofana, "The MOLEN$\rho \mu$-coded Processor," Proc. 11th Int'l Conf. Field-Programmable Logic and Applications (FPL 2001), Lecture Notes in Computer Science, vol. 2147, Springer-Verlag, 2001, pp. 275-285.
[10] D.C. Burger and T.M. Austin, The SimpleScalar Tool Set, Version 2.0, tech. report CS-TR-1997-1342, Univ. of Wisconsin-Madison, 1997.
[11] S. Vassiliadis, E. Hakkennes, S. Wong, and G. Pechanek, The Sum-of-Absolute-Difference Motion Estimation Accelerator Proc. 24th Euromicro Conf., pp. 559-566, Aug. 1998.
Additional Information

Citation:  Stamatis Vassiliadis, Stephan Wong, Sorin Cotofana, "Microcode Processing: Positioning and Directions," IEEE Micro, vol. 23,  no. 4,  pp. 21-31,  Jul/Aug,  2003

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