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Published Articles >> Table of Contents >> Abstract
March/April 2003 (Vol. 23, No. 2)
pp. 56-65
Hyperthreading Technology in the Netburst Microarchitecture
David Koufaty, Intel
Deborah T. Marr, Intel
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DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MM.2003.1196115
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By using existing processor resources more efficiently,hyperthreading technology improves performance at little costand increases chip size by less than 5 percent.
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References
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[1] L.A. Barroso et al., "Piranha: A Scalable Architecture Based on Single-Chip Multiprocessing," Proc. 27th ACM Int'l Symp. Computer Architecture, ACM Press, 2000, pp. 282-293.
[2] L. Hammond, B.A. Nayfeh, and K. Olukotun, "A Single-Chip Multiprocessor," Computer, Sept. 1997, pp. 79-85.
[3] D.J.C. Johnson, "HP's Mako Processor," Microprocessor Forum, Oct. 2001, http://www.cpus.hp.com/technical_references mpf_2001.pdf.
[4] J.M. Tendler, S. Dodson, and S. Fields, "POWER4 System Microarchitecture," tech. white paper, IBM Server Group, Oct. 2001.
[5] R. Alverson et al., "The Tera Computer System," Proc. Int'l Conf. Supercomputing, Assoc. of Computing Machinery, N.Y., 1990, pp. 1-6.
[6] M. Fillo, S.W. Keckler, W.J. Dally, N.P. Carter, A. Chang, Y. Gurevich, and W.S. Lee, “The M-Machine Multicomputer,” Proc. 28th Int'l Symp. MicroArchitecture (MICRO), pp. 146-156, Ann Arbor, Mich., Nov. 1995.
[7] B.J. Smith, "Architecture and Applications of the HEP Multiprocessor Computer System," Proc. SPIE Real Time Signal Processing IV, 1981, pp. 241-248.
[8] A. Agarwal et. al., “APRIL: A processor architecture for multiprocessing,” Proc. of the 17th Int’l Symp. on Computer Architecture, 1990, pp. 104-114.
[9] D.M. Tullsen, S.J. Eggers, and H.M. Levy, Simultaneous Multithreading: Maximizing On-Chip Parallelism Proc. Int'l Symp. Computer Architecture, pp. 392-403, 1995.
[10] D. M. Tullsen et al., "Exploiting Choice: Instruction Fetch and Issue on an Implementable Simultaneous Multithreading Processor," Proc. Int'l Symp. Computer Architecture, ACM, 1996, pp. 191-202.
[11] Intel Pentium 4 Processor Optimization Reference Manual, Intel Corp., order no. 248966,http://developer.intel.com/design/pentium4 manuals.
[12] D.T. Marr et al., "Hyperthreading Technology Architecture and Microarchitecture," Intel Technology J., vol. 6, no. 1, Feb. 2002, http://www.intel.com/technology/itj/2002 volume06issue01/.
[13] G. Hinton et al., "The Microarchitecture of the Pentium 4 Processor," Intel Technology J., 1st quarter 2001, http://www.intel.com/technology/itjq12001.htm .
[14] IA-32 Intel Architecture Software Developer's Manual, Vol. 3: System Programming Guide , Intel Corp., 2001, order no. 244472,http://developer.intel.com/design/pentium4 manuals.
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Additional Information
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Citation:
David Koufaty, Deborah T. Marr,
"Hyperthreading Technology in the Netburst Microarchitecture,"
IEEE Micro,
vol. 23,
no. 2,
pp. 56-65,
Mar/Apr,
2003
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